12.3.2.5 explain three operations in fetch-execute cycle (fetch /decode /execute) 

Fetch-Decode-Execute cycle

The processor responds to and processes the instructions that drive the computer. It contains the control unit, the arithmetic/logic unit (ALU) and registers.

The control unit coordinates and controls all the operations carried out by the computer. It operates by repeating three operations:

Fetch - In this step, the CPU fetches some data and instructions from the main memory (RAM) and then store them in its own temporary memory called 'registers';

Decode - The decoding step is where the CPU understands/works out what the instruction it has just fetched actually means. 
The CPU ‘decodes’ the instruction and gets things ready for the next step;

Execute - The Execute stage is where data processing happens. Instructions are carried out on the data. 

When once a cycle has been completed, a new cycle begins.

Watch video to 5:15

Author: Tom Scott

Author: TeamComputing

Registers/circuits involved

The circuits used in the CPU during the cycle are:

Program Counter (PC) - an incrementing counter that keeps track of the memory address of which instruction is to be executed next.

Memory Address Register (MAR) - the address in main memory that is currently being read or written.

Memory Buffer Register (MBR) or Memory Data Register (MDR) - a two-way register that holds data fetched from memory (and ready for the CPU to process) or data waiting to be stored in memory.

Current Instruction register (CIR) - a temporary holding ground for the instruction that has just been fetched from memory.

Status Register (SR) - contains bits that are set or cleared depending on the result of an instruction. For example, one bit will be set if an overflow has occurred, other bits will indicate whether the result of the last instruction was negative, zero or caused a carry.

Accumulator (ACC) - an internal CPU register used as the default location to store any calculations performed by the arithmetic and logic unit.

 

Control Unit (CU) - decodes the program instruction in the CIR, selecting machine resources such as a data source register and a particular arithmetic operation, and coordinates the activation of those resources.

Arithmetic logic unit (ALU) - performs mathematical and logical operations.

Register notation of the Fetch-Decode-Execute cycle

Steps:

MAR <== [PC]

MBR <== [Memory]_MARaddress; PC <== [PC]+1

CIR <== [MBR]

[CIR] executes

CPU simulator

Questions:

Exercises:

Ex. 1

Ex. 2

Ex. 3

Ex. 4

Ex. 5

Ex. 6

Exam questions: