System bus (extended)

1. Control bus
2. Data bus
3. Address bus
4. Questions
5. Exercises
6. Exam questions

12.3.2.4 explain how data is transferred between different components of a computer system through the address bus, data bus and control bus

12.3.2.6 explain how the clock speed, word length and bus width affect the performance  

Fetch-Decode-Execute cycle

1. Stages of cycle
2. Registers
3. Register notation
4. Questions
5. Exercises
6. Exam questions

12.3.2.5 explain three operations in fetch-execute cycle (fetch /decode /execute) 

Hardware & software requirements

1. Hardware requirements
2. Software requirements

11.2.2.7 define minimum requirements for hardware when implementing solutions

11.3.1.5 justify their choice of applied software and choice criteria based on the goals 

Cache memory & Virtual memory

1. Cache memory
2. Levels of cache memory
3. Virtual memory
4. Questions
5. Research questions
6. Exam questions
7. Exercises

11.3.4.2 explain the purpose of virtual memory

11.3.4.3 explain the purpose of cache memory
 

RAM vs ROM

1. Definitions and features
2. Comparisons
3. Questions
4. Exercises

11.3.4.1 explain the differences between RAM and ROM memory 

System bus

1. Definition
   1. Data bus
   2. Address bus
   3. Control bus
2. Questions
3. Exercuses

LO: 11.3.2.2 describe the purpose of CPU components, system bus and main memory

Von Neumann architecture

1. Definition
2. Memory and the stored program concept
3. Central Processing Unit (CPU)
4. Questions
5. Exercises
6. Exam questions

LO: 11.3.2.1 describe the interaction of CPU with peripheral devices

LO: 11.3.2.2 describe the purpose of CPU components, system bus, and main memory

Files are useful not just for the information they hold, but the way they hold that information...

Страничная и сегментная организация памяти

Критерии выбора носителя информации